A. Field of the Invention
The present invention relates to super-junction semiconductor devices exhibiting a high breakdown voltage and a high current capacity and applicable to insulated-gate field-effect transistors (hereinafter referred to as “MOSFET's”), insulated-gate bipolar transistors (hereinafter referred to as “IGBT's”), and bipolar transistors.
B. Description of the Related Art
Vertical power semiconductor devices, which include a drift layer including an alternating-conductivity-type layer that includes a heavily-doped n-type region and a heavily-doped p-type region arranged alternately and adjoining to each other in parallel to the major surface of the semiconductor device (hereinafter referred to simply as the “major surface”), are well known to the persons skilled in the art. The heavily-doped n-type regions and heavily-doped p-type regions are shaped to be long in perpendicular to the major surface and to be narrow in parallel to the major surface. Hereinafter, the semiconductor devices which include a drift layer including the alternating-conductivity-type layer as described above will be referred to as the “super-junction semiconductor devices”. In the super-junction semiconductor devices, pn-junctions extend in parallel to each other and in perpendicular to the major surface. In the OFF-state of the device, depletion layers expand from the pn-junctions to the n- and p-type regions on both sides thereof in parallel to the major surface, depleting the entire drift layer quickly. Therefore, the super-junction semiconductor devices facilitate obtaining a high breakdown voltage and low ON-state resistance simultaneously.
Power semiconductor devices may break down if an overcurrent is caused by a short-circuit in the power semiconductor devices. A method which provides the power semiconductor device with a current detecting section for detecting an overcurrent signal and controls the power semiconductor device gate based on the overcurrent signal to further control the current flowing through the power semiconductor device is employed widely to prevent the power semiconductor devices from breaking down. In the above-described general method for preventing the power semiconductor device from breakdown, a current detecting resistor is connected in series to a separate subsidiary device connected in parallel to a main device and a potential difference caused by an overcurrent across the current detecting resistor is detected.
The following Japanese Unexamined Patent Application Publication No. 2006-351985 discloses the application of the current detection method described above to a super-junction semiconductor device. As disclosed in JP 2006-351985, a current detecting cell region (sensing device region 8) which works as a current detecting section is formed in the chip, in which main device region 7 is formed, as shown in FIG. 3, to integrate sensing device region 8 and main device region 7 into a unit and further to simplify the parts and to reduce the size of the parts. In FIG. 3, separation region 9, n-type region 1 in main device region 7, p-type region 2 in main device region 7, n-type region 3 in separation region 9, p-type region 4 in separation region 9, n-type region 5 in sensing device region 8, and p-type region 6 in sensing device region 8 are shown.
The following Japanese Unexamined Patent Application Publication No. 2009-152506 discloses a semiconductor apparatus that facilitates detecting the current flowing through a main cell with a high accuracy. The semiconductor apparatus disclosed in JP 2009-152506 is formed as an assembly of a plurality of insulated-gate transistor cells formed on a semiconductor substrate. The respective gate terminals of a main cell and a sensing cell are connected in common. The respective source terminals of the main and sensing cells are connected in common. The drain of the sensing cell is connected commonly to the drain of the main via a current detecting resistor.
If alternating-conductivity-type-layer 100 that constitutes a drift layer is formed continuously of a planar stripe pattern common to the main and sensing device regions, as described in Japanese Unexamined Patent Application Publication No. 2006-351985 and as shown in FIG. 3, the current detection accuracy will be lowered, since the main and sensing device regions are connected electrically via the p-type region 2 internal resistance and since current leakage between the main and sensing device regions is inevitable. Therefore, it is necessary to separate main device region 7 and sensing device region 8 from each other electrically. If p-type region 2 is cut off between main device region 7 and sensing device region 8, alternating-conductivity-type layer 100 will be discontinuous between main device region 7 and sensing device region 8, lowering the breakdown voltage.
In view of the foregoing, it would be desirable to obviate the problems described above. It would be also desirable to provide a super-junction semiconductor device which prevents the breakdown voltage from lowering, even if the main device region and the sensing device region for current detection are separated from each other electrically.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above. It provides a super-junction semiconductor device with a sensing device region for current detection and facilitates preventing the breakdown voltage from lowering, even if the main device region and the sensing device region are separated electrically from the each other.